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Semiconductor Device Group

Semiconductor Materials Field

Process and material innovation with a focus on interface control for future semiconductor devices

Group Leader:Takuji Hosoi

Development of nanosheet formation, gate stack engineering, and interface control technologies for post silicon semiconductor devices

Current Topics

To further advance CMOS scaling, high-crystalline and atomically flat semiconductor nanosheets with high carrier mobility are indispensable. Theoretical study on electron mobility in 2‑nm‑thick nanosheets suggest that Ge(111) nanosheets may exhibit mobilities more than an order of magnitude higher than those of Si nanosheets [ 1 ]. However, the fabrication of such ultrathin Ge nanosheets remains challenging, and the predicted high mobility has yet to be experimentally demonstrated.

It has been reported that vacuum annealing of plasma‑nitrided GeN/Ge structures induces selective nitrogen desorption and recrystallization of Ge [ 2 ]. Based on this insight, we explore a novel method for forming Ge nanosheets. A stacked structure consisting of a GeN film and an Si capping layer was fabricated on a sapphire substrate, and Ge nanosheet formation was achieved by driving nitrogen atoms from the GeN layer into the Si capping layer through vacuum annealing (Fig. 1). This achievement opens a pathway toward the fabrication of ultrathin, high‑quality Ge nanosheets.

Fig.1 Schematics of the developed Ge nanosheet formation method and Ge 3d XPS spectra indicating change from GeN to Ge.

References

  1. K. Sumita, C.-T. Chen, K. Toprasertpong, M. Takenaka, S. Takagi,IEEE Trans. Electron Devices69, 2115 (2022). DOI: 10.1109/TED.2022.3143484
  2. K. Kutsuki, G. Okamoto, T. Hosoi, T. Shimura, H. Watanabe,Jpn. J. Appl. Phys.47, 2415 (2008). DOI: 10.1143/JJAP.47.2415

Group members

  • Takuji Hosoi

    Takuji Hosoi

    • Group Leader

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