Research
To realize the Society 5.0, high-performance semiconductor devices with low power consumption are essential, not only for digital infrastructure such as IoT, AI, and big data, but also for high-efficiency power electronics. We aim to develop innovative devices by focusing on the physics of interfaces between insulating films, metals, and semiconductors, which determine the performance and reliability of semiconductor devices, and by establishing guidelines for material design and interface control.
Ge nanosheet and Germanene
he MOS (Metal-Oxide-Semiconductor) transistors that serve as the "brains" of information devices such as smartphones and computers are no longer the planar types found in textbooks. Instead, they have evolved into three-dimensional structures such as FinFETs and Gate-All-Around (GAA) architectures, which utilize stacked nanosheets. Thinner nanosheets are desirable because they suppress short-channel effects more effectively. However, when silicon (Si) nanosheets are thinner than 4 nm, even slight thickness variations can significantly degrade carrier mobility. This issue has led to renewed interest in germanium (Ge) nanosheets. Ge offers higher carrier mobility than Si, and theoretical predictions suggest that a 2 nm-thick Ge(111) nanosheet could achieve ten times the mobility of a Si nanosheet. Unfortunately, fabricating Ge nanosheets remains challenging. Thinning single-crystal Ge can damage the crystal structure, and growing Ge nanosheets via epitaxy is difficult due to the Stranski-Krastanov (S-K) growth mode, which involves island formation and hinders the formation of flat layers.
Meanwhile, graphene —a two-dimensional material composed of carbon atoms arranged in a honeycomb lattice— garnered the Nobel Prize in Physics in 2010. Its germanium counterpart, germanene, has also been experimentally confirmed. However, germanene has only been synthesized on metallic substrates and is highly susceptible to oxidation, making it difficult to evaluate its electronic properties.
Our research group is actively exploring novel methods for fabricating both Ge nanosheets and germanene.
Challenge for SiC power MOSFET：SiO2/SiC interface
In power semiconductors, which are responsible for the electric power conversion and control, the replacement of MOS transistors used in electric vehicles (xEVs), railway inverters, and power conditioners for solar and wind power generation from silicon (Si) to silicon carbide (SiC) is progressing. However, SiC MOS transistors have not yet fully realized their potential, and one of the reasons is the SiO2/SiC interface. To improve the performance of SiC MOS transistors, we are working on elucidating the physical properties of the SiO2/SiC interface and developing novel gate oxide formation processes.