Semiconductor Materials - 05

Abstract

Semiconducting nanowires (NWs) have attracted great attention as a building block to improve the device performance associated with the miniaturization of transistors [1]. Our research aim is to develop a promising device architecture of the vertical NW gate-all-around (GAA) transistors, which utilize group III-V or IV semiconductor NWs as channel materials, as their shape with a large aspect ratio is suitable for creating the GAA-type structure of transistors. There are several methods reported so far to obtain vertical free-standing semiconductor NWs in the stie-controlled manner on a substrate. In the current study, therefore, we introduce our selective-area (i.e., site-controlled) growth methods for III-V and IV semiconductor NWs on semiconductor (111) substrates. The conventional and simple method for growing IV and III-V semiconductor NWs is the “vapor-liquid-solid (VLS)” method with a metal catalyst, in which “supersaturation” of source materials at the interface between a solid substrate and eutectic liquid nano-droplets is utilized as a driving force for crystal growth [1]. In the case of III-V semiconductor NWs, however, we can also use “faceting phenomenon” on the top and sidewall surfaces of NWs [2] as their growth rates are markedly different between crystal facet surfaces, which depend on the partial pressure of group V source gas and growth temperature [2-5]. This “faceting growth” enables us to realize the “selective-area (or, site-controlled) growth” of III-V semiconductor NWs (Fig. 1) without any use of metal catalysts, using the periodic array of circular openings formed by electron beam lithography and etching in the growth-inhibiting dielectric SiO₂ films deposited on a substrate.