For further scaling of transistors in logic integrated circuits, semiconductor nanosheets with high crystallinity, uniformity, and flatness are essential. Theoretical study on electron mobility for 2 nm-thick nanosheets suggested that Ge(111) nanosheets may offer mobility an order of magnitude higher than Si nanosheets [1]. We have previously succeeded in forming 2–3-nm-thick Ge nanosheets on sapphire substrates by stacking an ultrathin GeN layer and an amorphous Si layer, followed by thermal annealing to scavenge N atoms from GeN [2]. In this study, we attempted to form Ge nanosheets on SiO₂/Si substrates using the same approach. Ge crystallization was confirmed at temperatures of 600ºC and above (Fig. 1), which was found to be lower than the Ge nanosheet formation temperature on sapphire substrates (750ºC) [2]. The Ge–Ge peak intensity reached its maximum at 650ºC, while the FWHM reached its minimum, indicating the formation of Ge with high crystalline quality (Figs. 2(a) and 2(b)). At temperatures of 750ºC and below, the Ge–Ge peak shifted to lower wavenumbers relative to that of a single-crystalline Ge substrate, indicating the presence of tensile strain. Conversely, at temperatures of 800ºC and above, the peak shifted to higher wavenumbers, exhibiting compressive strain (Fig. 2(c)).

1. K. Sumita et al., IEEE Trans. Electron Devices. 69, 2115 (2022), DOI: 10.1109/TED.2022.3143484
2. S. Morimoto et al., The 86th JSAP Autumn Meeting, 8p-N324-5 (2025).